Qualcomm completed initial validation of its High Bandwidth Compute (HBC) stacked memory architecture. This architecture will be a core component of the company's forthcoming Dragonfly data center AI accelerators. Dragonfly accelerators are expected to begin sampling in 2027. The HBC architecture places DRAM layers directly on top of a compute die. This design aims to improve energy efficiency and memory bandwidth.
The successful validation signals the technology is performing close to expectations. It represents a significant step toward mass production next year. This development supports Qualcomm's strategy to expand into new markets, including AI-powered data centers. Qualcomm aims to keep investors informed of its progress.