Huawei plans to produce chips with 1.4-nanometer transistor density by 2031. The strategy bypasses U.S. sanctions by avoiding extreme ultraviolet (EUV) lithography machines supplied by ASML.
The company will utilize a LogicFolding method to vertically stack circuit layers. This architecture increases transistor density and power efficiency without requiring geometric transistor shrinkage.
Huawei expects to debut the LogicFolding design in Kirin smartphone processors. These new chips are scheduled for release in the fall of 2026. The technology improves performance by reducing the distance data travels within the semiconductor.
The announcement boosted Chinese semiconductor stocks as the country pursues technological self-sufficiency. Analysts note that significant manufacturing and engineering hurdles remain for the project.